Neural Architecture Search for Edge Computing: Efficient Models for Resource-Constrained IoT Devices

Wei, L., Zhang, F., Liu, Y., Sun, Q., Han, P.

DOI: 10.58921/ljci.2026.0201 ↗

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Highlights

Edge neural architecture search (NAS) for IoT devices must simultaneously minimize multiple competing objectives: model size, inference latency, energy consumption, and classification accuracy.
EdgeNAS presents an efficient NAS framework for IoT edge devices, incorporating platform-specific operation libraries for ARM Cortex-M and RISC-V processors and a multi-fidelity Bayesian optimization strategy.
Discovered architectures achieve 8.3× parameter reduction and 12.1× inference speedup compared to MobileNetV3, while maintaining accuracy within 1.2% on ImageNet and within 0.8% on four domain-specific benchmarks.

Abstract

Edge neural architecture search (NAS) for IoT devices must simultaneously minimize multiple competing objectives: model size, inference latency, energy consumption, and classification accuracy. EdgeNAS presents an efficient NAS framework for IoT edge devices, incorporating platform-specific operation libraries for ARM Cortex-M and RISC-V processors and a multi-fidelity Bayesian optimization strategy. Discovered architectures achieve 8.3× parameter reduction and 12.1× inference speedup compared to MobileNetV3, while maintaining accuracy within 1.2% on ImageNet and within 0.8% on four domain-specific benchmarks. Field deployment on Raspberry Pi 4 and STM32 microcontrollers confirms predicted performance with <5% deviation from simulation estimates.

Keywords

neural architecture search edge computing IoT model compression efficient deep learning

Outline

Highlights Abstract Keywords 1. Introduction 2. Related works 2.1 Background 2.2 Prior work 3. Methods 4. Results 5. Conclusion References

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